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| General Information | TPC Chairs | Antonia Ellerbrock | |||||||
| The Bonn & IBM Workshop on Processor Physical Design Efficiency is a collaborative effort between the University of Bonn and the Electronic Design Automation (EDA) organization at IBM. The workshop will consist of multiple tracks covering the most critical ongoing work in support of the 2nm high performance chips for the IBM mainframes. There will also be focus groups to fascilitate in person collaboration, engagement and brainstorming to help drive the most innovative set of EDA tools in the industry. | Ben Trombley | ||||||||
| Steering Committee | Leon Stok | ||||||||
| Jens Vygen | |||||||||
| TPC Members | Martin Drees | ||||||||
| Paula Heinz | |||||||||
| Location | Stephan Held | ||||||||
| Research Institute for Discrete Mathematics, University of Bonn, Germany | Nate Hieter | ||||||||
| Stefan Hougardy | |||||||||
| Dates | Stefan Rabenstein | ||||||||
| March 19–20, 2026 | |||||||||
| Wednesday | |||||||||
| Dinner | 07:00 | Location: BonnGout (Remigiusplatz 2-4, 53111 Bonn) | |||||||
| Thursday | |||||||||
| Track | Chair | Start Time | End Time | Speaker(s) | Title | Topic | |||
| Keynote | 09:00 | 09:30 | Stephan Held | Bonn Professor | Boosting Practical Performance with Provably Good Algorithms | ||||
| IBM Motivation Part 1 | Ben Trombley | 09:30 | 09:50 | Alex Suess | IBM EDA Optimization | Opportunities in E2E Construction Flows | |||
| 09:50 | 10:10 | Nate Hieter | IBM EDA Logic Synthesis | Improving Integration between Optimization and Placement | |||||
| Break | 10:10 | 10:20 | |||||||
| IBM Motivation Part 2 | Eduard Herkel | 10:20 | 10:40 | Ben Trombley | IBM EDA Placement | Adapting Placement for Future Technologies | |||
| 10:40 | 11:00 | Jesse Surprise | IBM Physical Design S2L | Leveraging S2L Reuse for Design Productivity | |||||
| 11:00 | 11:20 | Nancy Zhou | IBM EDA Wire Synthesis | Buffering Challenges for Large Scale Designs | |||||
| Break | 11:20 | 11:30 | |||||||
| IBM Motivation Part 3 | Zahi Kurzum | 11:30 | 11:50 | Smitha Reddy | IBM EDA Routing | Recent Advancements and Ongoing Challenges in Global and Detailed Routing | |||
| 11:50 | 12:10 | Stefan Rabenstein | IBM Ehningen Global Routing | Incremental Global Routing - Overview, Updates, and Suggestions | |||||
| 12:10 | 12:30 | Niko Klewinghaus | IBM Ehningen Detailed Routing | Visions for Detailed Routing | |||||
| Lunch | 12:30 | 01:30 | |||||||
| The Challenge | 01:30 | 01:35 | Alex Suess | IBM EDA Optimization | Design Thinking Workshop: Capacity & QoR Challenges | ||||
| Design Thinking Format | Zahi Kurzum | 01:35 | 01:45 | Design Thinking Workshop: The Format | |||||
| Canvas 1 | 01:45 | 02:00 | Leads: Leon, Alex, Smitha, Zahi, Eduard, Christoph | Design Thinking Workshop: Framing the Problem | |||||
| Canvas 2 | 02:00 | 03:30 | Leads: Leon, Alex, Smitha, Zahi, Eduard, Christoph | Design Thinking Workshop: Ideation | |||||
| Readout & Cake | Ben Trombley | 03:30 | 04:00 | ||||||
| Canvas 3 | 04:00 | 05:00 | Leads: Leon, Alex, Smitha, Zahi, Eduard, Christoph | Design Thinking Workshop: Prioritization | |||||
| Readout | Antonia Ellerbrock | 05:00 | 05:30 | Design Thinking Workshop: Readout of Ideas | |||||
| Closing Remarks | 05:30 | 05:45 | Jens Vygen | Bonn Professor | |||||
| Dinner | 07:00 | Location: Tuscolo (Gerhard-von-Are-Straße 8, 53111 Bonn) | |||||||
| Friday | |||||||||
| Track | Chair | Start Time | End Time | Speaker(s) | Title | Topic | |||
| Bonn: Placement & Synthesis | Jens Vygen | 09:00 | 09:20 | Susanne Armbruster | PhD Student in BonnLogic | Improving AND- and XOR-Components in Logic Restructuring Beyond Fanin-Trees | |||
| 09:20 | 09:40 | Martin Drees | PhD Student in BonnPlace | Rethinking Placement by Full Incorporation of Global Routing | |||||
| 09:40 | 10:00 | Edgar Perner | PhD Student in BonnPlace | Smarter Global Placement by Timing Integration | |||||
| Break | 10:00 | 10:10 | |||||||
| Bonn: Pangea & Buffering | Christoph Roth | 10:10 | 10:30 | Paula Heinz | PhD Student in BonnPangea | Pangea: Routing Reuse through Equivalence-Constrained Pin Assignment | |||
| 10:30 | 10:50 | Louis Carlin | PhD Student in BonnRouteBuffer | Boosting the Speed of Global Interconnect Optimization | |||||
| Break | 10:50 | 11:00 | |||||||
| Bonn: Global Routing | Stephan Held | 11:00 | 11:20 | Daniel Blankenburg | PhD Student in BonnRouteGlobal | Global Routing with Provably Good ACE | |||
| 11:20 | 11:40 | Antonia Ellerbrock | PhD Student in BonnRouteGlobal | Better & Faster Detailed Routing after Global Track Assignment | |||||
| Break | 11:40 | 11:50 | |||||||
| Bonn: Detailed Routing | Stefan Hougardy | 11:50 | 12:10 | Armin Settels | PhD Student in BonnRouteDetailed | DRC-Clean Routing with Decision-Guided SAT | |||
| 12:10 | 12:30 | Lorenzo Conti | PhD Student in BonnCell | Fast and DFM-Aware Transistor-Level Routing with Guaranteed Pin Accessibility | |||||
| Lunch | 12:30 | 01:30 | |||||||
| Canvas 4 | 01:30 | 02:30 | Leads: Leon, Alex, Smitha, Zahi, Eduard, Christoph | Design Thinking Workshop: Winning Idea Cards | |||||
| Readiness 3x Sheets | 02:30 | 03:15 | Leads: Leon, Alex, Smitha, Zahi, Eduard, Christoph | Design Thinking Workshop: Try-Now, Research or Park | |||||
| Cake Break | 03:15 | 03:30 | |||||||
| Readout | Zahi Kurzum | 03:30 | 04:15 | Design Thinking Workshop: Final Portfolio | |||||
| Wrap-Up | 04:15 | 04:45 | Leon Stok | IBM EDA Vice President | Closing Remarks | ||||
| Happy Hour | 05:00 | 06:00 | Location: Research Institute for Discrete Mathematics | ||||||